ALLDIGITALL
Objective of the research project is the study and the implementation of all-digital PLL (Phase Locked Loop) and CDR (Clock Data Recovery) devices.
The objective will be reached via the development and the prototyping of the all-digital architectures in FPGA and a further implementation in ASIC.
Objective of the project
electronics Research project on ALL digital pll devices
Research Program approved and financed by INFN CSN V
proJeCT timeline: 2013-2014
National coordinator: Dr. Vincenzo Izzo, INFN Napoli
PARTICIPATING INFN SECTIONS
Section of NAPOLI
Local Coordinator : IZZO Vincenzo, INFN
Department of Physics, University of Napoli - Federico II
Via Cintia, Complesso Monte S. Angelo, 80126, Napoli - Italy
Tel. +39 081 676305
email: vincenzo.izzo@na.infn.it
Section of cagliari
Local Coordinator : CADEDDU Sandro, INFN
Complesso Universitario di Monserrato
S.P. per Sestu, Km 0.700, 09042, Monserrato (Cagliari) - Italy
Tel. +39 070 6754971
email: sandro.cadeddu@ca.infn.it
Section of roma 1
Local Coordinator : AMELI Fabrizio, INFN
Department of Physics, University of Roma - La Sapienza
Piazzale Aldo Moro 2, 00185, Roma - Italy
Tel. +39 06 4991 3467
email: fabrizio.ameli@roma1.infn.it
